For decades, tremendous progresses in semiconductor technologies have been making drastic changes in our life in various fields including computing devices, cell phones, digital photos, internets, and medical diagnosis technologies. Especially A.I. (artificial intelligence) technologies are going to grow and spread revolutionarily in the coming decade which are enabledd by further progresses in the nonvolatile memory embedded logic device semiconductor process technologies which heavily rely on nanoscale material science and chemical engineering.
Interconnects which are used to connect active devices electrically are basically just passive components in LSI chips. Nevertheless, the influence of the interconnect parasitic resistance (R) / capacitance (C) started to affect circuit performance adversely and seriously which has driven the semiconductor industry to the shift from aluminum interconnect to copper interconnect 21 years ago. The negative effect of interconnect RC on LSI chip performance (speed and power consumption) and reliability is getting worse as the down scaling proceeds to nanoscale. Pessimism that copper interconnect is no longer extendable to finer dimensions is accelerating exploration of alternative conductors such as cobalt interconnect and ruthenium interconnect.
Roles of science and technology in the field of chemical engineering have been already the central part of semiconductor manufacturing processes such as CVD (chemical vapor deposition), CMP (chemical mechanical polishing) for years. Accurate control for formation of desired material structures depends on diffusion control in the gaseous, liquid and solid phases, chemical reaction control, analysis of individual chemical step in various sequences of manufacturing processes (exemplified in Fig. 1). Synthesis of new chemical precursors and advanced materials for newly introduced processes is also mandatory for break-through of technologies.
In this talk, further contribution and emerging necessity of chemical engineering for break-through in interconnect technologies are overviewed.
Power semiconductor devices are key device to carbon-dioxide-reduction technologies. We focus on a SiC device with a wide bandgap, that operates with low loss and high efficiency at temperatures up to 300 °C. Conventional isolation and sealing technologies cannot cope with such high operating temperatures; therefore, new advanced materials are necessary. The KAMOME project was setup in 2011 to support material development and evaluation for high-current SiC power modules. This report presents the outline of the six-year KAMOME project. In the first two years of project KAMOME-I, the module designed as the platform was confirmed to be able to evaluate a full SiC module. We attempted to produce four types of platforms, PT-1 to PT-4. In the following two years, project KAMOME-II was conducted using a large-size SiC- Schottky barrier diode (SBD) of 9.54 mm2. Various encapsulating materials, electrical bonding materials, and thermal conductive sheets, which are under development, were evaluated using SiC power modules for the platform. Concurrently, a novel polymer alloy having both a high heat resistance and low thermal expansion coefficient was prepared by melt mixing of two compounds, bismaleimide diphenyl methane (BMI) and 3,3′-(methylen-1,4-diphenylen)-bis(3,4-dihydro-2H-1,3-benzoxazine) (P-d). The resin comprising BMI 1.0 and P-d 0.3 exhibited superior thermal properties and processability compared to other combinations. When the compound was cured at 200 °C for 4 h, the glass transition temperature of the resulting product was > 300 °C. An encapsulation material was prepared using this polymer alloy and compared with those of conventional epoxy materials. In the final two years, KAMOME-III, by designing a simple package especially for the packaging techniques and materials, we could achieve a high evaluation accuracy with short routines. A package applied high heat-resistant encapsulation resin provided from participant companies, passed 50,000 cycles in a power cycle test with Tjmax = 225 °C and ΔT = 160 °C from 65 °C for the cooling temperature. A most excellent thermal conductive sheet maintained a stable heat transfer property for the SiC module after heating at 175 °C, 200 °C, and 250 °C for 500 h, respectively. In this project, 64 companies collectively participated mainly in developing the materials.
There are numerous joints in electronic products. The properties of the joints are crucial to the products' reliability. Several interesting and unexpected phenomena are observed at the joints of electronic products, such as polarity effect caused by electromigration and liquation caused by interfacial reactions. The uneven growth of the Ag3Sn phase in the Sn/Ag couples, i.e. polarity effect, was reported 20 years ago for the first time, and was realized to be caused by electromigration effect. Electromigration effect remains as an important but not fully understood effect in the electronic products. Unexpected liquation could be disastrous to the reliability of electronic products. The liquation phenomena encountered at the Sn-Sb/Ag, Cu/Bi2Te3 and γ-InSn4/Ni are illustrated. The unexpected melting of the Sn-5at%Sb solder was resulted from the excess intake of Ag from the substrate during first-step soldering, and an Ag-Sn low-melting eutectic was formed during the second-step soldering. The Ag-(Sn-5at%Sb) isoplethal section is used for illustration. The extremely fast dissolution rate observed in the Cu/Bi2Te3 couples at 350 °C was caused by the formation of liquid phase. Cu reacted with mostly Te in the Bi2Te3 substrate to form the Cu2Te phase, the excess Bi became a separate phase and was molten at 350 °C. It is illustrated with a Bi-Cu-Te isothermal section. The peculiar microstructure observed along the γ-InSn4/Ni interface was a result of two competing processes. When a compound of less indium was formed due to interfacial reactions, the solder became indium-rich, its melting point was lowered and a liquid phase was formed. This phenomenon and could be understood with a In-Sn-Ni isothermal section.
Critical dimension of semiconductor device has been reduced to 10nm level recently and the demand for atomic level processing is increasing. In this work, atomic layer etching processes were developed for silicon oxide and silicon nitride and applied to surface cleaning applications. This work can potentially replace conventional wet cleaning processes that are facing limitations due to the reduced dimension in nanometer scale and transport limitation of cleaning solutions. In this work, we developed and characterized plasma atomic layer etching process for SiO2 (native oxide) removal in an inductively coupled plasma (ICP) reactor. The process consists of two steps of a surface modification step and a reactant removal step. In the first step, SiO2 surface is modified with fluorocarbon polymers generated with CHF3, C4F8 or C3F7OCH3. In the second step the fluorinated oxide is removed with ions or radicals generated from Ar, or O2 plasma. Ion energy is controlled typically less than 100V. Formation of fluorocarbon polymer layer on SiO2 surface was confirmed by SEM and XPS analysis. The removal rates were controlled under 10 â/cycle by controlling plasma powers and reaction gas flowrates. Self-limited characteristics was confirmed in the removal rate showed self-limited characteristics as the processing time increases. The effect of surface cleaning was confirmed from metal-oxide-semiconductor devices fabricated on the cleaned surface of nanoscale patterns.